AMI MARK V BABY SCREAMER (s42)
Chipset
CPU sockets
FSB speeds
25MHz33MHz40MHz
Form factor
Baby AT (max 220 x 330 mm)
Dimensions
330mm x 218mm
I/O ports
1x
AT Keyboard
1x
Floppy interface
1x
IDE interface
1x
Parallel
2x
Serial
Expansion slots
8x
16-bit ISA
Notes:
DLC/SXL chips work with BARB method. DRAM.exe from Cyrix.exe tool is helpful for setting memory refresh >15ns, allowing for improved performance. ~40ns is (seemingly) optimal. J37 being short and changing J35 are not required for 40MHz FSB operation. J37 seems to slow the board slightly. The board works fine with 15ns cache at 40MHz, even though 12ns is "required" by the manual.
The manual also does not document/improperly documents the TAG situation. MTL says nothing is needed at U38 for 64k L2. This isn't true. One 64kx1 chip is needed, as noted in the manual.
Last updated 2023-07-12T20:58:28Z
Board info score is 9.2/10
Chipset
Chipset parts
VLSI VL82C331 (ISA Bus Controller)
VLSI VL82C106 (Combination I/O chip)
VLSI VL82C330 (System Controller)
VLSI VL82C332 (Data Buffer)
Super I/O chips
1 file available
Vendor: AMI [1 entry]
POST string
Note
Core Ver.
BIOS Ver.
Logs
POST string
40-0402-003642-00101111-121291-SCREAMER-F
Note
Revision B
Core version
BIOS version
Logs
No drivers available
2 board documents available
Release date
File
Logs
Chip
Release date
File
Logs
Disclaimer
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