DEC 21174 (Pyxis Northbridge Memory Controller)
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Chipset part
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1011 1011
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Also known as:

  • DEC 21174-CA

Description:

DEC 21174 Overview

The DIGITAL Semiconductor 21174 Core Logic Chip is a robust, cost-effective solution designed for uniprocessor systems using the 21164PC microprocessor. Packaged in a 474-pin plastic ball grid array (PBGA), the 21174 chip provides a 128-bit memory interface and a PCI I/O interface. Here are its key features:

  • 21164PC Microprocessor Interface: The 21174 chip serves as the intermediary between the 21164PC microprocessor, main memory, and the PCI bus. It implements a three-entry CPU instruction queue to capture commands when the memory or I/O port is busy.

  • Quick Switch Control: The chip provides control to the Quick Switch chips, isolating the L2 cache from the main memory bus during private reads and writes.

  • Memory Control and Clock Generation: The 21174 chip generates the clocks, row, and column addresses for the SDRAM DIMMs and all of the memory control signals (RAS, CAS, WE). It also contains all the required SDRAM refresh control.

  • PCI Address Mapping: The chip provides all the logic to map 21164PC noncacheable addresses to PCI address space, and all the translation logic to map PCI DMA addresses to system memory. It supports direct mapping and scatter-gather mapping, and contains an eight-entry scatter-gather translation lookaside buffer (TLB).

  • Main Memory Interface: The 21174 chip interfaces with the 21164PC/L2 cache and the memory/21174 through Quick Switches. The AlphaPC 164SX supports four 168-pin unbuffered 72-bit or 64-bit SDRAM DIMM modules, and supports a maximum of 512MB of main memory.

  • PCI Devices: The AlphaPC 164SX uses the PCI bus for most peripheral functions, supporting multiplexed, burst mode, read and write transfers. It supports synchronous operation of 33 MHz, and either a 32-bit or 64-bit data path with 32-bit device support in the 64-bit configuration. It provides parity on address and data cycles and supports three physical address spaces: 32-bit memory space, 32-bit I/O space, and 256-byte-per-agent configuration space.

  • ISA Bus Devices: The 21174 chip provides the bridge from the 21164PC system bus to the 64-bit PCI bus. It generates the required 32-bit PCI address for 21164PC I/O accesses directed to the PCI and accepts 64-bit double address cycles and 32-bit single address cycles, subject to some constraints.

Last updated 2019-04-30T00:00:00Z
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