Description:

VL82C593 PCI to ISA Bridge

Features:

• Bridges the PCI and ISA buses.
• Two 8259A interrupt controllers and the APIC I/O module.
• Two 8237A DMA controllers and their associated page registers.
• Real-Time Clock and CMOS RAM function (or, alternately, supports external RTC/CMOS).
• Port B logic.
• Tunable subtractive decoder (can be tuned to assert DEVSEL# in slow time slot).
• Programmable decoders for memory regions that exists on the ISA bus. This permits fast address decode of PCI accesses to the ISA bus. It also permits memory accesses initiated by ISA bus masters or DMA channels to be contained on the ISA bus and not be passed to the PCI bus.
• Handles shutdown-to-processor INIT conversion. When a PCI special cycle transaction is detected with the shutdown message, the '593 toggles INiT to force a system reboot.
• A20 mask function.
• Processor self-test initiation.
• FERR# to IRQ13 conversion.
• NMI generation. The '593 generates NMI when CHCHK is asserted on the ISA bus, or when SERR# is asserted on the PCI bus.
• Hot reset generation.
• System Management Mode (SMM) interrupt logic.
• Monitors up to 27 different events related to power management.
• Includes watchdog timer for SMM usage.
• Supports software generation of the system management interrupt.
• Includes logic utilized to stop the processor clock.
• Positive decode for system ROM and keyboard controller, permitting fast address decode within these ranges.
• POWERGOOD/Reset logic.
• Speaker timer.
• Support for turbo mode. Can be used to periodically stop the processor's clock to make the processor appear to run slower.
• Integrated X-bus buffers.
• Can increase ISA BUSCLOCK speed up to 16MHZ within specified ISA memory regions.
• Decoupled ISA memory refresh. ISA memory refresh can occur on the ISA bus while PCI transactions are in progress.
• Supports disabling of internal DMA controllers (permitting implementation of an external DMA controller).