Cyrix 6x86L PR120+ (6x86L-PR120+GP)
Package
Socket 7 (PGA321)
Family
Pentium MMX (P55)
Core
M1L
Speed
100MHz
FSB
50MHz
Process node
350nm
TDP
Unknown
Voltage
2.8V
L1 cache
16KB (Write-Back)
L2 cache
None
L3 cache
None
Instruction set
6x86
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